Operators

Logic operators

All standard bitwise operators work on bit, std_logic, and std_logic_vector:

Operator	Description	Example
and	AND	y <= a and b;
or	OR	y <= a or b;
nand	NAND	y <= a nand b;
nor	NOR	y <= a nor b;
xor	XOR	y <= a xor b;
xnor	XNOR	y <= a xnor b;
not	NOT (unary)	y <= not a;

For vectors, the operation applies to each bit position. Both operands must be the same length.

signal a, b, result : std_logic_vector(7 downto 0);
result <= a and b;    -- bitwise AND across all 8 bits
result <= not a;      -- invert every bit

Comparison

Operator	Description
=	Equal
/=	Not equal

Returns boolean. Typically used in if conditions:

if (sel = '1') then
    output <= in1;
end if;

Concatenation

The & operator joins bits and vectors into wider vectors:

signal upper : std_logic_vector(3 downto 0);
signal lower : std_logic_vector(3 downto 0);
signal full  : std_logic_vector(7 downto 0);

full <= upper & lower;
full <= '1' & upper & "000";   -- mix types freely

Indexing and slicing

signal vec : std_logic_vector(7 downto 0);

-- Read one bit
bit_val <= vec(0);

-- Read a slice
upper_nibble <= vec(7 downto 4);

Not yet supported

These operators are planned for future releases:

• Arithmetic: +, -, *, /, mod, rem
• Relational: <, <=, >, >=
• Shift / rotate: sll, srl, sla, sra, rol, ror
• Type conversions: to_integer(), to_unsigned(), etc.

See Known Limitations for the full list.